Computer Engineering Laboratory
The Computer Engineering Lab at the University of Michigan is the top US institution for total publications in top-tier architecture, circuit, and computer-aided design conferences (ISCA, MICRO, ISSCC, VLSI, DAC, DATE)
Welcome to the CE Lab
The Computer Engineering Lab at the University of Michigan is comprised of a multidisciplinary group of faculty and graduate students who conduct research related to hardware design, computer architecture, computer-aided design, and embedded systems.
Meet the people who make up the CE Lab >
Prospective graduate students
Lab members explore theoretical, experimental and applied aspects of computer design, spanning a broad range of hardware topics, including embedded systems design, hardware security issues, computer architecture and data centers architecture, computer-aided design, testing and validation. The research breadth also encompasses software layers close to hardware: operating systems and compilers.
Visit our prospective student page on the CSE website >
Energy efficiency in self-driving cars
PhD student Vidushi Goyal is working with Prof. Reetuparna Das to make electronics more energy efficient in personal devices and in autonomous vehicles.
Sonic Cyber Attacks on MEMS Accelerometers
PhD student Timothy Trippel is working with Prof. Kevin Fu to demonstrate how specially crafted sounds can be used to launch acoustic injection attacks against the sensors in many IoT devices.
CSE alum Akshitha Sriraman’s dissertation receives second ACM SIG recognition
Sriraman’s dissertation has won two major ACM SIG awards, from ACM SIGOPS and SIGARCH, as well as two additional prizes from U-M.
Scott Mahlke recognized with B. Ramakrishna Rau Award for accomplishments in microarchitecture
Mahlke’s research interests include energy-efficient processor design, machine learning, architecture synthesis, compilers for high-performance processors, and reliable computer system…
Todd Austin earns MICRO Test of Time for vulnerability assessment of microarchitecture
The paper introduced a means to estimate how prone a CPU’s microarchitecture is to the accumulation of logical errors.