Seminars

Innovating at the Intersection of Architecture and Emerging Workload Paradigms

Combating Randomness: Towards Efficient Data-Intensive Applications Using Software-Hardware Co-Design

Optimizing Graph Applications Through Graph Sparsification and Accelerator Design

Let’s Go Sparse: Towards Sparse-Aware Computing System Design

Improving Select Applications of Long-Read DNA Sequencing

Modern Clouds: Side-Channel Attacks and Defenses

Catch M(oor)e If You Can: Agile Hardware/Software Co-Design for Hyperscale Cloud Systems

Sub-cent Processors, Earable Computers, and Space Microdatacenters: Novel Computer Systems for Truly Ubiquitous Computing

20th Annual CSE Graduate Honors Competition

On Improving Robustness of Deep Neural Networks for Computer Vision

Mitigating Microarchitectural Vulnerabilities to Improve Cloud Security and Reliability

Efficient Data Movement for Accelerating Data-Intensive Applications

Achieving Security and Privacy via Encrypted Architectures

SafeBet: A Simple, Secure and Fast Solution for Spectre and Meltdown

A Statistical Approach to Stochastic Computing Design and Analysis

Overcoming the Performance and Security Challenges of Building Highly-Distributed Fault-Tolerant Embedded Systems

Accelerated Systems for Portable DNA Sequencing

Characterizing Laser Signal Injection and its Impact on the Security of Cyber-Physical Systems

Enabling Practical Deployments of Privacy-Preserving Technologies

Efficient and Dependable Deep Learning Systems

Acceleration Techniques of Sparse Linear Algebra on Emerging Architectures

Building User-Driven Edge Devices

Optimizing Emerging Graph Applications Using Hardware-Software Co-Design

Efficient, Reconfigurable, and QoS-Aware Systems for Deep Neural Networks

Compiler Support for Robust and High Performance Autonomous Driving Environments

Securing Connected and Automated Vehicle through Proactive Vulnerability Analysis and Security Enhancement

In-SRAM Computing for Neural Network Acceleration

Efficient utilization of heterogeneous compute and memory systems

Towards Free, Open, and Ubiquitous Hardware Design

In-Memory Acceleration for General Data Parallel Applications

18th Annual CSE Graduate Honors Competition

Compiler Auto-tuning For Code Optimization

Datacenter Architectures for the Microservices Era

Streaming Architectures for Medical Image Reconstruction

A Holistic Solution for Reliability of 3D Parallel Systems

Towards General Purpose Specialization

17th Annual CSE GRADUATE HONORS COMPETITION

Customized Systems of Deep Neural Networks for Energy Efficiency

Domain-specific Architectures for Data-intensive Applications

Progressive Automated Formal Verification of Hardware and Software Systems

Enabling Continuous Learning through Synaptic Plasticity in Hardware

Thwarting Advanced Code-reuse Attacks

Principled Secure Processor Design

A Graph-Based Dataflow Architecture for Executing Neural Networks

Getting Computer Systems Ready for Visual Computing in Ten Years

Efficient Deep Neural Network Computation on Processors